专利摘要:
The invention relates to a detector device assisted by majority current, comprising a semiconductor layer of a first conductivity type, at least two control regions of the first conductivity type, at least two detection regions of a second type of conductivity. conductivity opposite to the first type of conductivity and means for generating a majority carrier current associated with an electric field, characterized in that the detection regions surround the control regions to form at least two taps and that the concentration of dopants of the first type of conductivity in the semiconductor layer provides electrical isolation between the sensing regions to prevent leakage of minority carriers.
公开号:BE1023562B1
申请号:E2014/0670
申请日:2014-09-08
公开日:2017-05-04
发明作者:Kyriaki Korina Fotopoulou;Der Tempel Ward Van
申请人:Softkinetic Sensors Nv;
IPC主号:
专利说明:

A detector device assisted by a majority current
TECHNICAL FIELD OF THE INVENTION The invention relates to a majority current-assisted detector device for detecting electromagnetic radiation striking a semiconductor layer, in which a majority carrier current is generated between two control regions and in which the minority carriers -Generates are directed to a detection region under the influence of an electric field generated between the control regions. The invention can be used in imagers, particularly in time-of-flight imagers, in video games or other home applications, etc.
Background of the invention
Computer vision is a rapidly expanding field of research that includes methods to acquire, process, analyze and understand images. Notably, a computer vision research theme is the perception of depth, or in other words, three-dimensional (3D) vision.
Time-of-Flight technology, to take this example, is one of the most promising technologies for depth perception. A time-of-flight (TOF) camera system 3 is shown in FIG. 1. The TOF camera systems capture 3D images of a scene by analyzing the time of the scene. flight of light from a light source 18 to an object. The camera system TOF 3 includes a camera with a dedicated illumination unit 18 and data processing means 4.
The well-known basic operating principle of a standard TOF camera system is to actively illuminate scene 15 with modulated light 16 at a predetermined wavelength using the dedicated illumination unit. for example with light pulses of at least one predetermined frequency. Modulated light is reflected by objects in the scene. A lens 2 collects the reflected light 17 and forms an image of the objects on the imaging sensor 1 of the camera. Depending on the distance of the objects with respect to the camera, a delay is experienced between the emission of the modulated light, for example the so-called light pulses, and the reception of these reflected light pulses at the camera. of the camera. The distance between reflective objects and the camera can be determined according to the observed time delay and the constant value of the speed of light. In another more complex and reliable embodiment, a plurality of phase differences between the transmitted reference light pulses and the captured light pulses can be determined by correlation measurements and used to estimate the depth information.
The determination of the phase differences can in particular be carried out by current-assisted photonic demodulators (CAPDs). The principle of CAPDs is explained in EP1513202 and shown in Figure 2A-C. It is based on modulation nodes, also called "taps". The CAPD shown in Figure 2A-C includes two taps. Each tap consists of a control region 61, 62 and a detection region 63, 64. By controlling a potential applied between the control regions 61 and 62, it is possible to control the detectivity of the associated tap. When a photon is incident within a photosensitive area of a pixel, an electron / hole pair e '/ h + may be generated at a certain position. The electron / hole pair will be separated by an electric field which is present and which is associated with the circulating majority current. This electric field will cause the derivation of the photogenerated minority carriers 66, 69 in the opposite direction of the flowing main stream, that is to say to the detection regions 63, 64, respectively.
When a pixel comprises several taps and Iprs a positive potential is applied to a tap relative to the other taps, this tap is activated and will receive the majority of the photogenerated minority carriers in the pixel, as shown in Figure 2B and C By applying appropriate control signals to the control regions, correlation measurements can be made and the perception of the depth can be obtained.
In Figure 3, a 2-tap topology is presented to illustrate the prior art. The pixel contains two modulation nodes or taps. Each tap consists of a control region 6, 8 and a detection region 5, 7, respectively. In this topology, each detection region 5, 7 is surrounded by a control region 6, 8, respectively. The pixel also includes circuits 11,12 associated with taps. The circuit elements 11, 12 and the control regions 6, 8 may be highly p + doped regions while the detection region 5, 7 may be an n + type region. Each detection region 5, 7 may be associated with a depletion region 13, 14, for example a well-n-well region. In the prior art, the layer on which the device is formed is usually a layer p ''. The fact that the p-type control region surrounds the n-type detection region in a p-type layer avoids leakage between the two detection regions.
The field created between two control nodes must be as high as possible to obtain a strong detectivity and a strong demodulation contrast. This need implies a high power consumption; this is one of the main disadvantages of CAPDs. The power consumption P in a CAPD follows the following equation, where R and ΔΚ are the resistance and the potential difference between the control regions, respectively:
Power consumption can be reduced in many ways. First, the potential difference between the control regions can be reduced. Secondly, the distance between the control regions can be increased so as to increase the resistance between them. Both solutions will have an impact on the demodulation contrast of the device, as they impact the intensity of the electric field in the layer which determines the charge carrier transport rate and the demodulation rate.
In a conventional implementation of CAPD as represented in FIG. 2 AC and FIG. 3, the reduction in power consumption is typically obtained by separating the nodes by a highly ohmic epitaxial layer (for example doped p '') which, as a result, consumes the useful optical surface of the pixel and makes pixel pitch reduction difficult. In addition, the pixel transistors are typically located in a p-well area, again physically separated from the pixel detection nodes. The need for separation means that space can not be used for other things than pixel transistors. Therefore, in conventional CAPDS, pixel pitch reduction remains very difficult and ambitious when paired with a device specification targeting low power consumption and high fill factor.
A solution remains to be proposed to reduce the power consumption of the CAPDs while reducing the size of the pixels and maintaining a high speed of demodulation. The present invention provides a CAPD device architecture that provides a solution for additional pixel miniaturization without the detrimental impact on power consumption of a conventional CAPD approach at small pixel steps and at the same time allows a platform for implementing a CAPD configuration in BSI mode. Summary of the invention
The present invention relates to a majority-current-assisted sensor device according to claim 1.
Advantageously, the semiconductor layer is slightly doped with a dopant of the first type of conductivity (p or n '). The dopant concentration is preferably adapted to provide good electrical isolation between the detection regions.
The layer may also be formed on a substrate, the dopant concentration of the substrate being higher than the dopant concentration of the semiconductor layer. Enlightenment can be front-facing (in English Front Side Illumination, or FSI), or, preferably, from behind, by back-side illumination (in English Back-Side-lllumination or BSI).
Preferably, the detector device may comprise a semiconductor region of the first conductivity type formed in the semiconductor layer and located between the two detection regions, for isolating the detection regions, wherein the semiconductor region (45) is at least one of one of an ohmic contact, a well or a deep well. This semiconductor region provides important isolation of the control regions.
In the case of a backlighting implementation (BSI), the semiconductor region located between the two detection regions, being a well or a deep well, can be arranged to receive pixel circuit elements. This is really advantageous, since the size of the device can be considerably reduced, while ensuring the isolation of the detection regions.
Other advantages and new features of the invention will be better understood on reading the detailed description which follows and with reference to the accompanying drawings.
Brief description of the drawings
Figure 1 illustrates the basic operating principle of a TOF system; 2A is a top view of a device according to the prior art, FIGS. 2B and 2C show a cross-section of the device of FIG. 2A under two different current conditions;
Figure 3 shows a top view of a pixel according to the prior art, in which the control regions surround the detection regions;
Figure 4 shows a top view of a first embodiment of a sensor device according to the present invention;
Figure 5 shows a cross-section of the detector device of Figure 4 along the line A-A ';
Figure 6 shows a cross-section of a detector device according to another embodiment of the invention;
Figure 7 shows a cross-section of a detector device according to a further embodiment of the invention, wherein the illumination is by backlighting (BSI);
Figure 8 shows the differences between the FSI and BSI embodiments of the invention.
DESCRIPTION OF THE INVENTION The invention will now be explained with reference to an epitaxial layer and a p-type substrate, but the invention also relates to a complementary device in which the p and n regions become n and p regions, respectively. One skilled in the art is able to implement such modifications without departing from the spirit of the invention.
It is understood that the terms n, p, n +, p +, p and p ", well n (or n-well), well p (p-well), deep well n (deep n-well) and deep well p ( deep p-well) are terms well known to those skilled in the art.The terms n, p, n +, p +, p ', and p refer to doping levels in semiconductor materials well known to the human being. job.
The terms n and p refer to n- or p-doped regions, usually regions doped with arsenic or boron, respectively. The terms n + and p + refer to highly doped surface contact regions for wells n (well) and wells p (well), respectively. The term p 'refers to a lightly doped p-type region such as a well p (p-well) and the term p' 'refers to a p-type region with very low doping, close to the intrinsic concentration of at least two orders of magnitude smaller than that of p '. In this case, p '' can be a highly resistive or strongly ohmic epitaxial layer with a resistivity of approximately 550-10 kOhm.cm. For example, on the basis of these values for p '', a concentration of p 'may correspond to a resistivity of approximately 15 Ohm.cm -100 Ohm.cm and a p + + may correspond to a resistivity of approximately 0.01 -1 Ohm.cm.
Standard semiconductor materials used for basic CMOS applications such as logic, are epitaxial layers with a resistivity of 15 Ohm.cm and substrates with a resistivity of 0.001 Ohm.cm.
For RF and high voltage power applications, the resistivity of the epitaxial layer is about 50 to 120 ohm.cm with a thickness of 4 μm.
For imagers, such as CAPD, the epitaxial layer is often used, with a thickness of 10 to 23 μm and with a resistivity of 500 Ohm.cm to 10 kOhm.cm, and with a substrate, also known as bulk, with a resistivity of 0.01 Ohm. cm to 1 Ohm.cm.
The present invention relates to embodiments relating to both front (FSI) and backlight (ie backlight) illumination (BSI). The front and backlighting (FSI and BSI) devices are defined by reference to the location of the circuits on the chip compared to the incident light. FSI means a device in which light hits the same side as the circuits. With an illumination before FSI, the light falls on the front of the circuits, and passes through the read circuit and the interconnections before being collected in the photodetector.
On the contrary, BSI means a device in which the light hits the other side, where the circuits are not present. The main idea behind using a BSI structure is that no light is lost by passing through the circuits.
Figure 4 shows a top view of a first embodiment of a sensor device according to the present invention. In Figure 4, the detector device comprises four taps, formed in a semiconductor layer 40. Each tap comprises a control region MIX0, MIX1 surrounded by a detection region DET0, DET1, respectively. The detection regions may be rectangular in shape as shown in Figure 4, but not only. A source 41 injects current into the control region MIX0 and recovers the current in the control region MIX1. This source generates a current of majority carriers in the semiconductor layer 40 between the control regions MIX0, MIX1, the majority current being associated with an electric field. In the configuration shown in FIG. 4, the majority carriers are holes h + and the minority carriers are electrons. Line A-A 'of FIG. 4 represents the location where the cross section is made for FIG.
In Figure 4, the detector device is shown as a square. It is important to mention that the control electrode mix is an island encapsulated by the detection electrode ring so that any other potential geometry can be advantageously implemented, such as a circle or a polygon, but this is not limiting.
In Figure 5, the majority hole stream is represented by solid lines and its direction is represented by arrows. When an electromagnetic radiation 43, for example photons, strikes the layer 40, pairs of electrons / holes are generated in the layer 40. The pairs of electrons / holes are separated by the electric field which is present and associated with the current of majority holes flowing. Minority carriers 42 move to the detection region that is closest to the region where the majority carriers are recovered, i.e., DETO here. DET1 could also be activated according to the potential applied to MIXO and MIX1. The electron movements are due to a drift based on the present electric field associated with the circulating majority current.
The control regions MIXO, MIX1 comprise at least one PWELL port 28, 31. They can also comprise three distinct regions, a p +, a PWELL and a deep well p (deep PWELL). A highly doped semiconductor contact 27, 30, for example a p + contact, may be formed above the PWELL 28, 31. The fact of strongly doping this contact creates an ohmic contact used to inject the majority current via the source 41. PWELL deep well 29, 32 can also be provided under the well PWELL. The function of this PWELL deep well is to extend the control electrode deeper into the layer 40 so as to provide good control of the potential of the epitaxial layer and to reinforce the lateral field between the two MIX contacts.
The detection regions DETO, DET1 may comprise at least one NWELL well 24, 26 forming a pn junction with the semiconductor layer 40 to collect the generated minority carriers 42. The detection regions DETO, DET1 may comprise, but this is not a n-type region which may be any combination of the following: an N + implant, a NWELL well or a deep n-well (NW NWELL) creating a pn-junction photodetector such as an N + / PSUB photodiode, NWELL / PSUB, DNWELL / PSUB with the semiconductor layer 40 to collect the minority carriers generated 42. The detection regions DETO, DET1 may also comprise an n + contact 23, 25 formed above the NWELL 24, 26 to create an ohmic contact with the circuits 21, 22 and allow for example the reading of minority carriers via a read circuit. The NWELL 24, 26 should be placed near the MIXO, MIX1 hole current source so as to increase the chances and speed with which the electrons will diffuse into the NWELL 24, 26 through the pn detection junction and thereby increase the sensitivity of the detector. The NWELL should be able to capture the photo-generated electrons captured by the lateral field between the two MIX electrodes and drifting towards the larger polarization tap.
In the prior art, as illustrated in FIG. 3, the p-type control regions 6, 8 surround the n-type detection regions 5, 7 and are formed in a p-type layer. This means that the detection regions 5, 7 are electrically isolated by the control regions 6, 8 which surround them and that the minority carriers captured can not escape. Short circuits can not be formed between the detection regions. In the case of ISFs (front illumination), the wafer material used for the implementation of the CAPDs is usually a p-doped epitaxial layer, on which the photodiodes and the pixel circuits are fabricated. This layer p '' is slightly doped with boron to obtain a resistivity between 500 Ohm.cm and 10 kOhm.cm. A substrate can also be used. It is usually a strongly p ++ boron doped material with a resistivity of 0.01-1 Ohm.cm, on which the epitaxial silicon layer is constructed.
Usually, for InfraRed (IR) applications (850 nm), the substrate or water has a total thickness of 750 μm, the upper 23 μm being the highly resistive or weakly doped epitaxial silicon layer where the photogenerated minority carriers (e-) are created. The thickness of the epitaxial layer is adapted to respect the absorption of IR light in silicon which is around 15-20 μm. Minority carriers should be generated in the epitaxial layer and not in the substrate so that they can be collected by the detectors or cathodes of the photodiode junctions. Recombination within the heavily doped substrate should be avoided.
In the present invention, the location of the p-type control regions MIXO, MIX1 and n-type detection regions DETO, DET1 is changed and the detection regions DETO, DET1 surround the control regions MIXO, MIX1. In the present invention, the control regions MIXO, MIX1 are islands encapsulated by the detection regions. This change reduces the distance between the nodes without compromising power consumption by using the NWELL sensing regions as isolation between the two MIX electrodes. Thus, the resistance between the two MIX contacts remains high and the pixel size is reduced. By exchanging the position of the control and detection regions, the n-type detecting regions DETO, DET1 are now closer, which increases the chances of short-circuits and leakage of minority carriers captured. The present invention proposes to adapt the conductivity of the semiconductor layer 40 so as to provide electrical insulation between the detection regions DETO, DET1 to avoid leakage of the minority carriers. A resistivity of at least 50 Ohm.cm provides sufficient isolation between NWELL detection wells without significantly impacting power consumption since the PWELL MIX regions are encapsulated by NWELL rings. The conductivity of the semiconductor layer 40 may be adapted for example by slightly doping the layer 40. The layer 40 may be doped p 'for example, instead of p' 'in the prior art. Doping slightly more layer 40 allows to slightly increase the concentration of holes in the layer and thus slightly reduce the concentration of electrons in the layer 40. With a less resistive layer, the electrons captured in the regions of Detection DET, DET1 can no longer flee. The region around and between the DETO, DET1 detection regions should provide such isolation.
The layer 40 may also comprise a semiconductor region, formed in the semiconductor layer and located between the detection regions. The layer 40 may contain a p-type implanted semiconductor region 45 which may be a surface p + layer, a PWELL p well or a deep PWELL between the DETO, DET1 detection elements to electrically isolate the two taps. A p + or deeper surface layer PWELL can also be set up between the NWELL nodes to isolate the two taps. This embodiment is not shown for the front lighting FSI case, but only for the BSI backlight case, in Figure 7, but it should be understood that this embodiment can be implemented for two cases, FSI and BSI.
In a further embodiment shown in Figure 6, the layer 40 is formed on a substrate 44. The concentration of dopants in the substrate 44 may be higher than that of the layer 40. For example, the substrate 44 may be a p ++ layer while the layer 40 may be a p 'layer. This means that if the substrate 44 on which the device is formed is p ++, then a lightly doped layer 40 'should be formed above, before making the control and detection regions MIX0, MIX1, DETO and DET1. The conductivity of the layer 40 between the detection regions DETO, DET1 should be adapted to provide electrical isolation and avoid leakage of the minority carriers.
In the embodiments shown in Figures 4, 5 and 6, the illumination is a front illumination (Front Side Illumination or FSI), that is to say, the light strikes on the layer 40 on the same side as the circuits 22, 21.
In a further embodiment shown in Fig. 7, illumination 46 is backlit (Back Side Illumination or BSI) and strikes substrate 44 on the other side of the chip. In the case of BSI, the epitaxial layer 40 is thinned to a range, for example, 5-100 μm (preferably 5 to 30 μm) depending on the illumination wavelength of the targeted application. . The heavily doped substrate 44 is replaced by a thin layer of the order of 1 to 3 μm in thickness according to the method chosen. The doping of this implanted surface layer 44 is of the same order as that of the original SUB p ++ substrate of the FSI case.
In the case of the BSI, the same wafer material is used and the same nomenclature for the lightly doped epitaxial layer p 'and the heavily doped p ++ substrate can be applied.
The difference between the BSI and the ISP is that, in the case of the BSI, the majority of the highly p ++ doped substrate is consumed during a BSI backface grinding step. The back side of the wafer becomes the front face, that is to say the optical surface where the light hits. The majority of the substrate is ground on the backside to expose the weakly doped or strongly resistant epitaxy.
This change from FSI to BSI allows circuit elements within region 45 to be placed between taps to reduce the total size of pixel 20 without affecting the device fill factor. The function of the region 45 is to provide electrical isolation between the detectors and to be able to contain the circuit. A surface area p +, a well p PWELL or a deep implant p (deep PWELL) can be formed in the region 45 located between the regions DET0, DET1 to isolate the two taps. The region 45 may be an electrically floating or grounded island in the embodiment where the pixel circuitry is buried therein. In the case where a PWELL well or deep PWELL is applied, the region 45 can accommodate circuit elements (PIXEL circuit of Figure 8) and can be referred to as the circuit element region. of the pixel.
In such a case, the resistivity of the p-layer 40 may correspond to a standard CMOS base doping, for example 15 Ohm.cm. An epitaxial layer p '"of 550 ohm.cm at 10 kOhm.cm can be used in conjunction with region 45 to isolate the two taps, and implementing a BSI backlight makes it possible to collect the The resulting image has less digital noise, and low-light performance is improved.
In FIG. 7, the detector device is presented with a layer 40 and a substrate 44. The device could also be implemented with only one layer 40, as in FIG. 5, if the conductivity of the layer 40 is adapted to provide electrical insulation between the detection regions DET0 and DET1.
In Figure 8, the differences between FSI devices (Figure A) and BSI (Figure B) are better represented. In the case of BSI, the epitaxial layer is thinned to a thickness depending on the wavelength of the targeted application, for example 5-100 μm and preferably 5 to 30 μm for a wavelength of InfraRed illumination. The heavily doped substrate 44 of FIGS. 6 and 7 is replaced by a thin layer 1 to 3 μm thick according to the manufacturing method chosen. The doping of this implanted surface layer 44 is of the same order of magnitude as the SUB p ++ substrate layer 44 of the FSI case of FIG. 6. It should be noted that, in the case of FSI, the semiconductor regions 45 are not configured. to receive circuitry elements.
权利要求:
Claims (9)
[1]
claims
1. A majority current-assisted detector device for detecting electromagnetic radiation (43, 46) comprising: - a semiconductor layer (40) on which electromagnetic radiation (43, 46) can strike to generate majority carrier pairs and minority and which is doped with a dopant of a first conductivity type, - at least two control regions (MIXO, MIX1) formed in the semiconductor layer (40), being doped with a dopant of the first conductivity type; a source (41) for generating a majority carrier current in the semiconductor layer (40) between the two control regions (MIXO, MIX1), the majority current being associated with an electric field; at least two detection regions (DETO, DET1) formed in the semiconductor layer (40) and doped with a dopant of a second conductivity type opposite to the first conductivity type, to form a junction and to collect minority carriers generated (42), the minority carriers (42) being directed to one of the two detection regions (DETO, DET1) under the influence of the electric field associated with the majority carrier current; the detection regions (DETO, DET1) surround the control regions (MIXO, MIX1) to form at least two taps; the concentration of dopants of the first conductivity type in the semiconductor layer (40) provides an electrical isolation between the detection regions (DETO, DET1) by avoiding leakage of minority carriers of the detection regions (DETO, DET1). the detector device being characterized in that: - the thickness of a semiconductor substrate (44) on which the semiconductor layer (40) is formed is configured for a backlight; the detector device further comprises a semiconductor region (45) of the first conductivity type formed in the semiconductor layer (40) and located between the two detection regions (DETO, DET1) to isolate the detection regions (DETO, DET1) the semiconductor region (45) being a well or a deep well and including pixel circuit elements (PIXEL circuit, 21,22).
[2]
2. The detector device of claim 1, wherein the semiconductor layer (40) is a p-doped epitaxial layer.
[3]
The detector device of claim 1, wherein the semiconductor layer (40) is an n-doped epitaxial layer.
[4]
The detector device according to any one of claims 1 to 3, wherein the semiconductor layer (40) is formed on a semiconductor substrate (44) doped with a dopant of the first conductivity type, wherein the dopant concentration of the semiconductor substrate (44) is higher than the dopant concentration of the semiconductor layer (40).
[5]
5. The detector device according to any one of claims 1 to 4, wherein the detection regions (DETO, DET1) comprise a well (24, 26) doped with a dopant of a conductivity type opposite to the first type of conductivity.
[6]
The detector device according to claim 5, wherein the detection regions (DETO, DET1) further comprise an ohmic contact (23, 25) formed in the semiconductor layer (40) above said well (24, 26) of said opposite conductivity type.
[7]
7. The detector device according to any one of claims 1 to 6, wherein the control regions (MIX0, MIX1) comprise a well (28; 31) doped with a dopant of the first conductivity type.
[8]
8. The detector device according to claim 7, wherein the control regions (MIX0, MIX1) further comprise an ohmic contact (23; 25) formed in the semiconductor layer (40) above said well (28, 31) of said first type of conductivity.
[9]
The sensor device according to claim 7 or 8, further comprising a deep well (29,32) doped with a dopant of the first conductivity type formed in the semiconductor layer (40) under the well (28,31). control regions (MIXO, MIX1) to provide an intense field between the control regions (MIXO, MIX1).
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法律状态:
优先权:
申请号 | 申请日 | 专利标题
EP141748244|2014-06-27|
EP14174824.4A|EP2960952B1|2014-06-27|2014-06-27|Majority carrier current assisted radiation detector device|
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